Chinese translation for "risc cpu"

精简指令集

Related Translations:

risc:  RISC,Risc,risc= reduced instruction set computer [computing] 【计算机】简化指令系统计算机[精简指令集运算]。

risc architecture:  简单指令处理器结构

rt risc technology risc:  技术

vrvideo risc processor:  视频精简指令集计算机处理器

rvi risc vliw processor:  精简指令集计算机超长指令字处理器

cri cisc risc processor:  复杂指令集计算机与精简指令集计算机处理器

arm advanced risc machines:  高级精简指令集机器

rvip risc vliw processor:  精简指令集计算机超长指令字处理器

vr video risc processor:  视频精简指令集计算机处理器

risc reduced instruction system computer:  精简指令系统计算机

Example Sentences:

	1.	At last , the paper involves the flow and related data of logic simulation , logic synthesis and test vector in the risc cpu 论文最后给出了64位vegacpu的asic逻辑仿真文件和仿真波形，逻辑综合策略、综合脚本和综合结果，以及vegacpu基于atpg的测试向量设计流程和相关数据。
	2.	At last , eda tools generate netlist for semiconductor manufactory . the eda technology and veriolog hdl must speed up the design of risc cpu in china 高性能精简指令集微处理器的设计通过运用veriloghdl语言， eda工具，和asic设计的主要流程，缩短了设计周期，加快其产品的面市速度。
	3.	Linux is an open and free operation system ; arm is an excellent 32 - bit risc cpu core , and most powerful embedded cpus are designed on the base of arm Linux操作系统是个开源、免费的操作系统, arm是当前全球领先的16 / 32位risc微处理器内核,现在大多数功能强大的嵌入式处理器都基于arm内核构建。
	4.	It ’ s a 16 / 32bits risc cpu based on arm920t ip core , which is highly integrated and powerful . this cpu has a lot of peripheral interfaces and i / o ports , which will facilitate our system design . the asic ime6400 is a system level chip which supports the multi - channel mepg4 video / audio compression . in our design , it ’ s served as an video compression oriented co - processor working under the control of s3c2410x . s3c2410x will do the job of importing the other vehicle traveling data such as analog and switch signals 在笔者设计的系统中, ime6400作为专门进行数字视频信号压缩的协处理器,与s3c2410x协同工作,完成视频信号的获取,压缩等工作;同时利用芯片的片内外设(如ad转换器和i / o口) ,完成汽车行驶过程中开关量和模拟量的获取和存储,以满足一个记录仪的基本功能需求。
	5.	The paper elaborates risc technology characteristic and 5 - stage pipeline architecture and function of the 64 - bit risc cpu , and dwells on 64 - bit vega cpu characteristic , and details the eda technology and the main flow of asic design , and elaborates the operation and exception process of the vega cpu and virtual instruction address " architecture and generation , and details cache architecture and mmu . the master dissertation dwells on virtual address translating into physical address , instruction cache finding address and instruction fetching , too 详细的阐述了64位vegacpu的特点，阐述了eda技术和asic设计的主要流程，阐述了vegacpu流水线结构、流水线操作、流水线暂停和异常处理，虚拟指令地址的结构和产生， mmu结构，包括指令tlb结构和虚拟指令地址向物理指令地址的生成流程， cache结构，寻址原理和指令的写策略，指令高速缓存的寻址原理和结构，以及指令的获取流程。

Similar Words：

"risbrandt" Chinese translation, "risby" Chinese translation, "risc" Chinese translation, "risc - reduced into silly code" Chinese translation, "risc architecture" Chinese translation, "risc reduced instruction set computer" Chinese translation, "risc reduced instruction system computer" Chinese translation, "risc reduced instructions set code" Chinese translation, "risc reduction instruction set chip" Chinese translation, "risc remote information systems center" Chinese translation